When the MCUs are assembled onto the rev 02 boards they are blank. Furthermore, no code, be it the boot-loader or the application has been developed. So with that will comes debugging and with that debugging comes the need to load the MCU Flash on multiple occasions, not to mention access to the MCU during debugging. Soldering wires directly to the target board test points of the MCU SWD interface is certainly possible. However in our experience it is a royal PIA and should be done as a last resort sans other options. Further one would need to do this to all ten prototypes. To address this we decided upon creating two jigs to support these tasks. The jigs permit interconnection of the J-link pod with the MCU SWD interface on the target board. We chose the SWD interface over the EZ-port interface because of the debugger support. We chose the SWD interface over the JTAG interface because of the lower pin count.We're using actual Rev 02 boards as the base template of the jig. Which is perfect because it ensures proper alignment of the jig pogo pins to the test point pads of the target board. Alignment is conveniently achieved utilizing the key switch center holes which are non-plated through. Thus there is no possibility of shorting layers on the target board. Phenolic washers are used as spacers to ensure spacing which is compatible with the height of the jig pogo pins. Further being non-metallic, there is no risk of shorting anything on the top layer of the target board (target boards are put upside down for mating with the jig). The hot glue gun got another opportunity for use. Hot glue makes for a reasonable stress-relief on the wiring at the J-Link pod ribbon cable header and at where it transitions with the jig board edge. Simple M-F standoffs are used and threaded onto the alignment screws to put slight positive pressure on the target board to ensure good continuity with the pogo pins on the jig.